A low frequency MEMS energy harvester scavenging energy from magnetic field surrounding an AC current-carrying wire

This paper reports on a low frequency piezoelectric energy harvester that scavenges energy from a wire carrying an AC current. The harvester is described, fabricated and characterized. The device consists of a silicon cantilever with integrated piezoelectric capacitor and proof-mass that incorporates a permanent magnet. When brought close to an AC current carrying wire, the magnet couples to the AC magnetic field from a wire, causing the cantilever to vibrate and generate power. The measured average power dissipated across an optimal resistive load was 1.5 μW. This was obtained by exciting the device into mechanical resonance using the electro-magnetic field from the 2 A source current. The measurements also reveal that the device has a nonlinear response that is due to a spring hardening mechanism

Comparing leakage currents and dark count rates in Geiger-mode avalanche photodiodes

This letter presents an experimental study of dark count rates and leakage current in Geiger-mode avalanche photodiodes (GM APD). Experimental results from circular diodes over a range of areas (20-500 mum diam), exhibit leakage current levels orders of magnitude higher than anticipated from dark count rates. Measurements of the area and peripheral components of the leakage current indicate that the majority of the current in reverse bias does not enter the high-field region of the diode, and therefore, does not contribute to the dark count rate. Extraction of the area leakage current term from large-area devices (500 mum) corresponds well with the measured dark count rates on smaller devices (20 mum). Finally, the work indicates how dark count measurements represent 10(-18) A levels of leakage current detection in GM APDs. (C) 2002 American Institute of Physics. (DOI: 10.1063/1.1483119

Ultra-long metal nanowire arrays on solid substrate with strong bonding

Ultra-long metal nanowire arrays with large circular area up to 25 mm in diameter were obtained by direct electrodeposition on metalized Si and glass substrates via a template-based method. Nanowires with uniform length up to 30 μm were obtained. Combining this deposition process with lithography technology, micrometre-sized patterned metal nanowire array pads were successfully fabricated on a glass substrate. Good adhesion between the patterned nanowire array pads and the substrate was confirmed using scanning acoustic microscopy characterization. A pull-off tensile test showed strong bonding between the nanowires and the substrate. Conducting atomic force microscopy (C-AFM) measurements showed that approximately 95% of the nanowires were electrically connected with the substrate, demonstrating its viability to use as high-density interconnect

Heterodimensional FET with split drain

A modification to heterodimensional field effect transistors (HDFET) is introduced and demonstrated to provide novel switching capabilities. The modification consists of introducing a split drain into the HDFET structure allowing the transistor to operate as a single pole-double throw switch. By extension, multiple pole-multiple throw switches can be made within a single transistor structure by introduction of multiple split drains or sources. If the device is fabricated on silicon germanium substrates, compatibility of the structure with conventional CMOS processing is achievable, allowing for new applications in digital, mixed signal, and high voltage switching

Silver nanowire array-polymer composite as thermal interface material

Silver nanowire arrays embedded inside polycarbonate templates are investigated as a viable thermal interface material for electronic cooling applications. The composite shows an average thermal diffusivity value of 1.89x10(-5) m(2) s(-1), which resulted in an intrinsic thermal conductivity of 30.3 W m(-1) K(-1). The nanowires' protrusion from the film surface enables it to conform to the surface roughness to make a better thermal contact. This resulted in a 61% reduction in thermal impedance when compared with blank polymer. An similar to 30 nm Au film on the top of the composite was found to act as a heat spreader, reducing the thermal impedance further by 35%. A contact impedance model was employed to compare the contact impedance of aligned silver nanowire-polymer composites with that of aligned carbon nanotubes, which showed that the Young's modulus of the composite is the defining factor in the overall thermal impedance of these composites

Broadening the Bandwidth of Piezoelectric Energy Harvesters Using Liquid Filled Mass

AbstractA narrow bandwidth is one of the most challenging issues that vibrational energy harvesters have to overcome. This paper demonstrates a novel method of broadening the bandwidth without significantly reducing the peak output voltage. The method uses a liquid filled mass to create a sliding mass effect in order to broaden the bandwidth. The fluid mass increased the full-width-half-maximum (FWHM) value from 1.6Hz to 4.45Hz with no significant decrease in peak-to-peak voltage when compared to an empty mass. The fluid filled mass has a non-linear mass distribution during low frequency, high acceleration applications

Impact study of substrate materials on wireless sensor node RF performance

In this paper, the effect of the substrate on wireless sensor network (WSN) node s RF performance is studied experimentally by using different substrate materials with different thickness. A six-layer FR4 substrate PCB WSN node is fabricated and compared with the original two-layer FR4 PCB node to show the impact of substrate material thickness. Also different substrate dielectric constants impacts are studied by the same method. All these demonstrators are modeling by RF circuit analysis method and simulated in the Ansoft Designer software. Simulation results match the experimental measurement. An optimization method based on simulation for WSN node design with different substrate is presented. This analysis, modeling, simulation and optimization procedure can be carried out on some novel substrate materials such as LTCC and LCP

Statistical method of modeling and optimization for wireless sensor nodes with different interconnect technologies and substrates

A comparison study was carried out between a wireless sensor node with a bare die flip-chip mounted and its reference board with a BGA packaged transceiver chip. The main focus is the return loss (S parameter S11) at the antenna connector, which was highly depended on the impedance mismatch. Modeling including the different interconnect technologies, substrate properties and passive components, was performed to simulate the system in Ansoft Designer software. Statistical methods, such as the use of standard derivation and regression, were applied to the RF performance analysis, to see the impacts of the different parameters on the return loss. Extreme value search, following on the previous analysis, can provide the parameters' values for the minimum return loss. Measurements fit the analysis and simulation well and showed a great improvement of the return loss from -5dB to -25dB for the target wireless sensor node

Effect of solder volume on joint shape with variable chip-to-board contact pad ratio

The objective of this paper is to investigate the effect of the pad size ratio between the chip and board end of a solder joint on the shape of that solder joint in combination with the solder volume available. The shape of the solder joint is correlated to its reliability and thus of importance. For low density chip bond pad applications Flip Chip (FC) manufacturing costs can be kept down by using larger size board pads suitable for solder application. By using “Surface Evolver” software package the solder joint shapes associated with different size/shape solder preforms and chip/board pad ratios are predicted. In this case a so called Flip-Chip Over Hole (FCOH) assembly format has been used. Assembly trials involved the deposition of lead-free 99.3Sn0.7Cu solder on the board side, followed by reflow, an underfill process and back die encapsulation. During the assembly work pad off-sets occurred that have been taken into account for the Surface Evolver solder joint shape prediction and accurately matched the real assembly. Overall, good correlation was found between the simulated solder joint shape and the actual fabricated solder joint shapes. Solder preforms were found to exhibit better control over the solder volume. Reflow simulation of commercially available solder preform volumes suggests that for a fixed stand-off height and chip-board pad ratio, the solder volume value and the surface tension determines the shape of the joint